An exemplary embodiment relates to the capacitor of a nonvolatile memory device and, more particularly, to the capacitor of a nonvolatile memory device for increasing capacitance.
A nonvolatile memory device includes a pump circuit for generating voltages for a program operation, a read operation, and an erase operation. The pump circuit may include a plurality of capacitors for pumping operations.
FIG. 1 is a cross-sectional view showing the capacitor of a conventional nonvolatile memory device.
Referring to FIG. 1, a tunnel insulating layer 11, a conductive layer 12 for a floating gate, a dielectric layer 13, a conductive layer 14 for a control gate, and a metal layer 15 are sequentially stacked over a semiconductor substrate 10. The conductive layer 14 penetrates the dielectric layer 13, being electrically coupled to the conductive layer 12. A first node is coupled to the junction 16 of the semiconductor substrate 10, and a second node is coupled to the metal layer 15.
The capacitors of the conventional nonvolatile memory device may be formed when memory cells are fabricated. The conductive layer 14 for a control gate and the conductive layer 12 for a floating gate are electrically coupled to form a capacitor structure.
In order to increase capacitance of the capacitor, the area of the conductive layer 12 may be increased. In this case, however, the degree of integration of nonvolatile memory devices may be adversely affected.